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原理图部分

原理图总共32页,截图如下所示

PCI-Express Gen2 x16 Interface

Frame Buffer Partitions A/B 

Frame Buffer Partition C and FBVDDQ Power/Decoupling 

Memory Lower Partition A 

Memory Upper Partition A

Memory Lower Partition B 

Memory Upper Partition B

Memory Lower Partition C

Memory Upper Partition C

Memory FBVDD/Q Decoupling

Power/Decoupling: NVVDD,3V3_NV,GRND,Power Distribution Matrix

IFPA/B LVDS Dual Link

IFPC HDM

IFPD DP & Aux Circuit

IFPE/F Dual Link TMDS DVI-I

DAC_A VGA 

DAC_B Header

NVGEM, MIOA, and Debug Port

BIOS, HDCP, External SS, Mechanical Components

GPIOs, Thermal Sensor, I2C/GPIO Expanders

Status LEDS

JTAG, Fan Control, Auxillary Devices

Straps

NVVDD (PS1) / FBVDDQ (PS2)

NVVDD (PS1) Phase 2 and 3 Drivers

FBVDD (PS3) Optional/Debug

5V/3.3V (PS4) Dual Switcher and 1V8 LDO (PS7)

PEX_VDD Switcher (PS5) and Miscellaneous Voltage Rails

Power Supervision and Sequencing

Remote Voltage/Current Sensing

12V EXT / 12V PEX Power Select Circuit

PCB部分

整体图

顶层

第二层第三层第四层第五层第六层第七层底层

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