当前位置:首页 > > ZYNQ
		


1. 使用内核版本4.9:linux-xlnx-xilinx-v2017.4


(1)petalinux-create --type project --template zynq --name lwip


进入lwip文件夹执行:petalinux-config --get-hw-description     your_wapper.hdf ,导入硬件。

Linux Components Selection  ->  linux-kernel (ext-local-src)  ->  填入你的内核路径/home/linux-xlnx-xilinx-v2017.4


(2)记得修改/Downloads/lwip/ax_peta/project-spec/meta-user/recipes-bsp/device-tree/files下的system-user.dtsi为如下


/include/ "system-conf.dtsi" / {
 model = "Zynq  Development Board";
 compatible = "alinx,axi eth", "xlnx,zynq-7000";
 usb_phy0: usb_phy@0
 {
 compatible = "ulpi-phy"; #phy-cells =; reg = <0xe0002000 0x1000>;
 view-port = <0x0170>;
 drv-vbus;
 };


};


&usb0 { 
 usb-phy = <&usb_phy0>;
};

&sdhci0 {
 u-boot,dm-pre-reloc;
};

&uart1 {
 u-boot,dm-pre-reloc;
};


&flash0 {
 compatible = "micron,m25p80", "w25q256", "spi-flash";
};


&gem0 {
 phy-handle = <ðernet_phy>;
 ethernet_phy: ethernet-phy@1 {
 reg = <1>;
 device_type = "ethernet-phy";
 };
};

&axi_ethernet_0 { local-mac-address = [00 0a 35 00 03 22]; 
 phy-handle = <&phy1>;
 xlnx,has-mdio = <0x1>; 
 phy-mode = "rgmii"; 
 mdio { 
 phy1: phy@1 { 
 device_type = "ethernet-phy"; 
 reg = <1>; 
 };
 }; 
};

&axi_ethernet_1 { local-mac-address = [00 0a 35 00 03 23]; 
 phy-handle = <&phy2>;
 xlnx,has-mdio = <0x1>; 
 phy-mode = "rgmii"; 
 mdio { 
 phy2: phy@1 { 
 device_type = "ethernet-phy"; 
 reg = <1>; 
 };
 }; 
};


(3)添加驱动: petalinux-config -c kernel


Device Drivers

 -> Network device support

 ->PHY Device support and infrastructure

 ->         <*> Micrel PHYs     记得save保存


(4)生成启动文件,放入SD卡,ifconfig可以看见eth0,eth1和eth2;


2. 在内核4.14加入驱动:


先source到arm-linux-gnueabihf-的编译环境,然后执行 make menuconfig ARCH=arm



修改system-top.dtsi,要加上如下节点

{
 amba_pl: amba_pl {
 #address-cells = <1>;
 #size-cells = <1>;
 compatible = "simple-bus";
 ranges ;
 axi_dma_0: dma@40400000 {
 #dma-cells = <1>;
 axistream-connected = <&axi_ethernet_0>;
 axistream-control-connected = <&axi_ethernet_0>;
 clock-names = "s_axi_lite_aclk";
 clocks = <&clkc 15>;
 compatible = "xlnx,eth-dma";
 interrupt-names = "mm2s_introut", "s2mm_introut";
 interrupt-parent = <&intc>;
 interrupts = <0 29 4 0 30 4>;
 reg = <0x40400000 0x10000>;
 xlnx,include-dre ;
 };
 axi_dma_1: dma@40410000 {
 #dma-cells = <1>;
 axistream-connected = <&axi_ethernet_1>;
 axistream-control-connected = <&axi_ethernet_1>;
 clock-names = "s_axi_lite_aclk";
 clocks = <&clkc 15>;
 compatible = "xlnx,eth-dma";
 interrupt-names = "mm2s_introut", "s2mm_introut";
 interrupt-parent = <&intc>;
 interrupts = <0 33 4 0 34 4>;
 reg = <0x40410000 0x10000>;
 xlnx,include-dre ;
 };
 axi_ethernet_0: ethernet@41000000 {
 axistream-connected = <&axi_dma_0>;
 axistream-control-connected = <&axi_dma_0>;
 clock-frequency = <100000000>;
 clock-names = "ref_clk";
 clocks = <&clkc 0>;
 compatible = "xlnx,axi-ethernet-1.00.a";
 device_type = "network";
 interrupt-names = "mac_irq", "interrupt";
 interrupt-parent = <&intc>;
 interrupts = <0 31 1 0 32 4>;
 phy-mode = "rgmii";
 reg = <0x41000000 0x40000>;
 xlnx = <0x0>;
 xlnx,axiliteclkrate = <0x0>;
 xlnx,axisclkrate = <0x0>;
 xlnx,clockselection = <0x0>;
 xlnx,enableasyncsgmii = <0x0>;
 xlnx,gt-type = <0x0>;
 xlnx,gtinex = <0x0>;
 xlnx,gtlocation = <0x0>;
 xlnx,gtrefclksrc = <0x0>;
 xlnx,include-dre ;
 xlnx,instantiatebitslice0 = <0x0>;
 xlnx,phy-type = <0x3>;
 xlnx,phyaddr = <0x1>;
 xlnx,rable = <0x0>;
 xlnx,rxcsum = <0x0>;
 xlnx,rxlane0-placement = <0x0>;
 xlnx,rxlane1-placement = <0x0>;
 xlnx,rxmem = <0x1000>;
 xlnx,rxnibblebitslice0used = <0x0>;
 xlnx,tx-in-upper-nibble = <0x1>;
 xlnx,txcsum = <0x0>;
 xlnx,txlane0-placement = <0x0>;
 xlnx,txlane1-placement = <0x0>;
 local-mac-address = [00 0a 35 00 00 00];
 phy-handle = <&phy0>;
 axi_ethernet_0_mdio: mdio {
 #address-cells = <1>;
 #size-cells = <0>;
 phy0: phy@0 {
 device_type = "ethernet-phy";
 reg = <0x0>;
 };
 };
 };
 axi_ethernet_1: ethernet@41040000 {
 axistream-connected = <&axi_dma_1>;
 axistream-control-connected = <&axi_dma_1>;
 clock-frequency = <100000000>;
 clock-names = "ref_clk";
 clocks = <&clkc 0>;
 compatible = "xlnx,axi-ethernet-1.00.a";
 device_type = "network";
 interrupt-names = "mac_irq", "interrupt";
 interrupt-parent = <&intc>;
 interrupts = <0 35 1 0 36 4>;
 phy-mode = "rgmii";
 reg = <0x41040000 0x40000>;
 xlnx = <0x0>;
 xlnx,axiliteclkrate = <0x0>;
 xlnx,axisclkrate = <0x0>;
 xlnx,clockselection = <0x0>;
 xlnx,enableasyncsgmii = <0x0>;
 xlnx,gt-type = <0x0>;
 xlnx,gtinex = <0x0>;
 xlnx,gtlocation = <0x0>;
 xlnx,gtrefclksrc = <0x0>;
 xlnx,include-dre ;
 xlnx,instantiatebitslice0 = <0x0>;
 xlnx,phy-type = <0x3>;
 xlnx,phyaddr = <0x1>;
 xlnx,rable = <0x0>;
 xlnx,rxcsum = <0x0>;
 xlnx,rxlane0-placement = <0x0>;
 xlnx,rxlane1-placement = <0x0>;
 xlnx,rxmem = <0x1000>;
 xlnx,rxnibblebitslice0used = <0x0>;
 xlnx,tx-in-upper-nibble = <0x1>;
 xlnx,txcsum = <0x0>;
 xlnx,txlane0-placement = <0x0>;
 xlnx,txlane1-placement = <0x0>;
 local-mac-address = [00 0a 35 00 00 01];
 phy-handle = <&phy1>;
 axi_ethernet_1_mdio: mdio {
 #address-cells = <1>;
 #size-cells = <0>;
 phy1: phy@1 {
 device_type = "ethernet-phy";
 reg = <0x1>;
 };
 };
 };
 };
};

&gem0 {
 status = "okay";
 phy-mode = "rgmii-id";
 phy-handle = <ðernet_phy>;

 ethernet_phy: ethernet-phy@0 {
 reg = <0>;
 device_type = "ethernet-phy";
 };
};
本站声明: 本文章由作者或相关机构授权发布,目的在于传递更多信息,并不代表本站赞同其观点,本站亦不保证或承诺内容真实性等。需要转载请联系该专栏作者,如若文章内容侵犯您的权益,请及时联系本站删除。
关闭