IMEC台积电高通合作为III-V FinFET采用InGaAs晶体管

台积电高通合作为III-V FinFET采用InGaAs晶体管0' />

InGaAs晶体管

元器件交易网讯 11月6日消息，据外媒 Electronicsweekly报道， IMEC宣布已为III-V FinFET 组装300mm 制程晶圆片，该晶圆片采用了铟砷化镓(化学符号为InGaAs)、磷化铟( indium phosphide)化合物，将容纳近8%的原子晶格失配。

IMEC此次项目合作公司有TSMC、Intel、Samsung、Sony、 Qualcomm 和Toshiba。

InGaAs晶体管的优点是能够减少芯片尺寸，提高信息处理的速度，用作半导体材料，用于光纤通信技术，并广泛用于探测器! 当电子在InGaAs中的传输速度是硅的数倍，其传输电流是最先进的硅晶体管的2.5倍，同时，InGaAs晶体管的尺寸仅仅为60纳米。

核心CMOS高级副总裁 An Steegen说：“300mm 制程 III-V FinFET 设备将成为全球首次兼容CMOS功能的设备，这是一个激动人心的成就，因为它将有可能替代当前最先进的硅基长波长光电FinFET技术，成为下一代高容量生产可行替代方案。”

此新技术基于所捕获到的晶体缺陷的长宽比、槽结构和外延工艺创新。 FinFET 晶圆设备上集成了III-V，从而显示出优秀性能。

IMEC逻辑研发主任 Aaron Thean表示，“ 下一步计划将按比例缩小的硅和非硅类设备扩展结合，这将成为下一个戏剧性晶体管历史创新，将打破数字CMOS领域近50年的硅晶体管设计。”(元器件交易网龙燕 译)

外媒原文：

Imec has fabricated III-V based finfets on 300mm silicon wafers using indium gallium arsenide and indium phosphide.

Imec says the process could first be used at the 7nm node.

Partners with Imec in the project are TSMC, Intel, Samsung, Sony, Qualcomm and Toshiba.

“To our knowledge, this is the world’s first functioning CMOS compatible III-V FinFET device processed on 300mm wafers,” stated An Steegen, senior vice president core CMOS at imec, “this is an exciting accomplishment, demonstrating the technology as a viable next-generation alternative for the current state-of-the-art Si-based FinFET technology in high volume production.”

Imec’s process selectively replaces silicon fins with indium gallium arsenide (InGaAs) and indium phospide (InP), accommodating close to eight percent of atomic lattice mismatch.

The new technique is based on aspect-ratio trapping of crystal defects, trench structure, and epitaxial process innovations. The resulting III-V integrated on silicon FinFET device shows an excellent performance.

Aaron Thean, Imec’s director of the logic R&D says: “The ability to combine scaled non-silicon and silicon devices might be the next dramatic transistor face-lift, breaking almost 50 years of all-silicon reign over digital CMOS.”