ARM笔记：U-Boot之移植 nand-flash 驱动

时间：2018-10-30 12:00:01

关键字： ARM u-boot 移植驱动 nand-flash

[导读]1、增加nand_flash.c 文件：cpu/arm920t/s3c24x0/nand_flash.c#include#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)#include#includeDECLARE_GLOBAL_DATA_PTR;#define S3C2410_NFSTAT_READY(

1、增加nand_flash.c 文件：cpu/arm920t/s3c24x0/nand_flash.c

#include

#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include
#include

DECLARE_GLOBAL_DATA_PTR;

#define S3C2410_NFSTAT_READY(1<<0)
#define S3C2410_NFCONF_nFCE(1<<11)

#define S3C2440_NFSTAT_READY(1<<0)
#define S3C2440_NFCONT_nFCE(1<<1)

static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();

if (chip == -1) {
s3c2410nand->NFCONF |= S3C2410_NFCONF_nFCE;
} else {
s3c2410nand->NFCONF &= ~S3C2410_NFCONF_nFCE;
}
}

static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
struct nand_chip *chip = mtd->priv;

switch (cmd) {
case NAND_CTL_SETNCE:
case NAND_CTL_CLRNCE:
printf("%s: called for NCE/n", __FUNCTION__);
break;

case NAND_CTL_SETCLE:
chip->IO_ADDR_W = (void *)&s3c2410nand->NFCMD;
break;

case NAND_CTL_SETALE:
chip->IO_ADDR_W = (void *)&s3c2410nand->NFADDR;
break;

default:
chip->IO_ADDR_W = (void *)&s3c2410nand->NFDATA;
break;
}
}

static int s3c2410_nand_devready(struct mtd_info *mtd)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();

return (s3c2410nand->NFSTAT & S3C2410_NFSTAT_READY);
}

static void s3c2440_nand_select_chip(struct mtd_info *mtd, int chip)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();

if (chip == -1) {
s3c2440nand->NFCONT |= S3C2440_NFCONT_nFCE;
} else {
s3c2440nand->NFCONT &= ~S3C2440_NFCONT_nFCE;
}
}

static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
struct nand_chip *chip = mtd->priv;

switch (cmd) {
case NAND_CTL_SETNCE:
case NAND_CTL_CLRNCE:
printf("%s: called for NCE/n", __FUNCTION__);
break;

case NAND_CTL_SETCLE:
chip->IO_ADDR_W = (void *)&s3c2440nand->NFCMD;
break;

case NAND_CTL_SETALE:
chip->IO_ADDR_W = (void *)&s3c2440nand->NFADDR;
break;

default:
chip->IO_ADDR_W = (void *)&s3c2440nand->NFDATA;
break;
}
}

static int s3c2440_nand_devready(struct mtd_info *mtd)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();

return (s3c2440nand->NFSTAT & S3C2440_NFSTAT_READY);
}

static void s3c24x0_nand_inithw(void)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();

#define TACLS0
#define TWRPH0 4
#define TWRPH1 2

if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
{

s3c2410nand->NFCONF = (1<<15)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);
}
else
{

s3c2440nand->NFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4);

s3c2440nand->NFCONT = (1<<4)|(0<<1)|(1<<0);
}
}

void board_nand_init(struct nand_chip *chip)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();

s3c24x0_nand_inithw();

if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410) {
chip->IO_ADDR_R= (void *)&s3c2410nand->NFDATA;
chip->IO_ADDR_W= (void *)&s3c2410nand->NFDATA;
chip->hwcontrol= s3c2410_nand_hwcontrol;
chip->dev_ready= s3c2410_nand_devready;
chip->select_chip = s3c2410_nand_select_chip;
chip->options= 0;
} else {
chip->IO_ADDR_R= (void *)&s3c2440nand->NFDATA;
chip->IO_ADDR_W= (void *)&s3c2440nand->NFDATA;
chip->hwcontrol= s3c2440_nand_hwcontrol;
chip->dev_ready= s3c2440_nand_devready;
chip->select_chip = s3c2440_nand_select_chip;
chip->options= 0;
}

chip->eccmode= NAND_ECC_SOFT;
}

#endif

2、同时修改该目录下的 Makefile:29 行
COBJS = i2c.o interrupts.o serial.o speed.o
usb_ohci.onand_flash.o

3、在 include/s3c24x0.h 中定义 S3C2440_NAND 结构体:168 行

typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCONT;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFMECCD0;
S3C24X0_REG32 NFMECCD1;
S3C24X0_REG32 NFSECCD;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFESTAT0;
S3C24X0_REG32 NFESTAT1;
S3C24X0_REG32 NFMECC0;
S3C24X0_REG32 NFMECC1;
S3C24X0_REG32 NFSECC;
S3C24X0_REG32 NFSBLK;
S3C24X0_REG32 NFEBLK;
} S3C2440_NAND;